diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index c295731..004efd4 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -16,8 +16,6 @@
 
 int pci_fixup_pcic(struct pci_channel *chan)
 {
-	ctrl_outl(0x00000001, SH7780_PCI_VCR2);
-
 	/* Enable all interrupts, so we know what to fix */
 	pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
 	pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM);
@@ -26,8 +24,6 @@
 	pci_write_reg(chan, 0xFB00, SH7780_PCISTATUS);
 	pci_write_reg(chan, 0x0047, SH7780_PCICMD);
 	pci_write_reg(chan, 0x00, SH7780_PCIPIF);
-	pci_write_reg(chan, 0x00, SH7780_PCISUB);
-	pci_write_reg(chan, 0x06, SH7780_PCIBCC);
 	pci_write_reg(chan, 0x1912, SH7780_PCISVID);
 	pci_write_reg(chan, 0x0001, SH7780_PCISID);
 
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 45fa423..7f4f590 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -72,16 +72,15 @@
 {
 	u32 word;
 
+	pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST >> 8, SH7780_PCIBCC);
+	pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST & 0xff, SH7780_PCISUB);
+
 	/* set the command/status bits to:
 	 * Wait Cycle Control + Parity Enable + Bus Master +
 	 * Mem space enable
 	 */
 	pci_write_reg(chan, 0x00000046, SH7780_PCICMD);
 
-	/* define this host as the host bridge */
-	word = PCI_BASE_CLASS_BRIDGE << 24;
-	pci_write_reg(chan, word, SH7780_PCIRID);
-
 	/* Set IO and Mem windows to local address
 	 * Make PCI and local address the same for easy 1 to 1 mapping
 	 */